3.2.13
Port0:0C3h / Port1:N/A D_BulkIntEnb (Device Bulk Interrupt Enable)
Base Address: Port0=000h, Port1=200h
Mode
Ofst Adrs
Register Name
Device
0C3h
D_BulkIntEnb
This permits or prohibits assertion of the MainIntStat register D_BulkIntStat bit using the D_BulkIntStat register
interrupt factors.
S2R72V18 Technical Manual (Rev.1.00)
R/W
Bit Symbol
R/W
7: EnCBW_Cmp
R/W
6: EnCBW_LengthErr
R/W
5: EnCBW_Err
4:
R/W
3: EnCSW_Cmp
R/W
2: EnCSW_Err
1:
0:
EPSON
Description
0: Disable
1: Enable
0: Disable
1: Enable
0: Disable
1: Enable
0:
1:
0: Disable
1: Enable
0: Disable
1: Enable
0:
1:
0:
1:
3. Register Details
Reset
00h
283