Epson S2R72V18 Technical Manual page 191

1. Functions
Ex: Transfer start conditions: Count (8 bytes) > FIFO data (4 bytes); Transfer stop
conditions: Count 0
XDREQ
XDACK
DATA
XCS
XRD
XWRL,H
(1) The DMA circuit operation is started by writing "1" to the DMA_Control.DMA_Go bit.
(2) XDREQ is asserted when data is written to the FIFO from the USB, permitting data to be
read from externally.
(3) XDACK is asserted and DMA transfer starts.
(4) XDREQ is negated once the FIFO is empty.
(5) XDREQ is asserted when data is written to the FIFO from the USB, permitting data to be
read from externally.
(6) XDACK is asserted and DMA transfer starts.
(7) XDREQ is negated when the DMA_Count last data is transferred.
174
(2) (4)
(3)
(1)
Fig. 1-83 Count mode read timing
EPSON
(5) (7)
(6)
S2R72V18 Technical Manual (Rev.1.00)