Epson S2R72V18 Technical Manual page 365

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3. Register Details
Bit1
TEST_K
Setting this bit to "1" concurrently with the EnHS_Test bit allows switching to Test_K test mode.
This test mode enables the host port to send "K" in HS mode.
Bit0
Test_Packet
Setting this bit to "1" concurrently with the EnHS_Test bit allows switching to Test_Packet test
mode. This test mode can be used only with CH0. Set the FIFO area joined to CH0 to 64 bytes
before switching to this test mode, clear the FIFO area, and write the test packet data shown below
to the FIFO area. Also set H_CH0Config_1.TID = 00b.
The following 53 bytes are written to the FIFO in packet transmission test mode:
00h, 00h, 00h, 00h, 00h, 00h, 00h, 00h,
00h, AAh, AAh, AAh, AAh, AAh, AAh, AAh,
AAh, EEh, EEh, EEh, EEh, EEh, EEh, EEh,
EEh, FEh, FFh, FFh, FFh, FFh, FFh, FFh,
FFh, FFh, FFh, FFh, FFh, 7Fh, BFh, DFh,
EFh, F7h, FBh, FDh, FCh, 7Eh, BFh, DFh,
EFh, F7h, FBh, FDh, 7Eh
PID and CRC are added by SIE when sending test packets. This means that the data written to the
FIFO consists of data from the following DATA0 PID data to the CRC16 data of the test packet
data described in the USB standard Rev 2.0.
348
EPSON
S2R72V18 Technical Manual (Rev.1.00)

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