Port0:164H / Por1:364H H_Usb_Test (Host Usb_Test) - Epson S2R72V18 Technical Manual

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3.3.23

Port0:164h / Por1:364h H_USB_Test (Host USB_Test)

Base Address: Port0=000h, Port1=200h
Mode
Ofst Adrs
Register Name
Host
164h
H_USB_Test
This sets the host USB 2.0 test mode operations.
Test mode can be run in WAIT_CONNECT, DISABLED, and SUSPEND states.
The respective state processing must be stopped before switching to test mode from these states. Use the
following procedure when switching to test mode:
• Set TranGo bit (H_CHx{x=0,a-e}Config_0.TranGo), H_CTL_SupportControl.CTL_SupportGo, and
H_CHaBO_SupportCtl.BOSupportGo to "0" for all channels.
• Write 0x80 to the H_NegoControl_0 register.
• Confirm that the H_NegoControl_0.AutoModeCancel bit has changed to "0."
• Set any one of the lower five bits of the register to "1" concurrently with the EnHS_Test bit.
Write 0x00 to this register when switching from one test mode to another test mode or when ending test mode.
Test mode ends, and the host state switches to IDLE.
Bit7
EnHS_Test
Setting any one of the lower five bits of the H_USB_Test register to "1" concurrently with this bit
switches to the test mode corresponding to the bit.
Bit6-5
Reserved
Bit4
Test_Force_Enable
Setting this bit to "1" concurrently with the EnHS_Test bit allows switching to TestForceEnable test
mode. This test mode enables the host port to send SOF in HS mode and detect disconnection.
Bit3
Test_SE0_NAK
Setting this bit to "1" concurrently with the EnHS_Test bit allows switching to Test_SE0_NAK test
mode. This test mode enables the host port to receive data in HS mode.
Bit2
TEST_J
Setting this bit to "1" concurrently with the EnHS_Test bit allows switching to Test_J test mode.
This test mode enables the host port to send "J" in HS mode.
S2R72V18 Technical Manual (Rev.1.00)
R/W
Bit Symbol
R/W
7: EnHS_Test
6:
5:
R/W
4: Test_Force_Enable
R/W
3: Test_SE0_NAK
R/W
2: Test_J
R/W
1: Test_K
R/W
0: Test_Packet
EPSON
Description
0: Do nothing
1: EnHS_Test
0:
1:
0:
1:
0: Do nothing
1: Test_Force_Enable
0: Do nothing
1: Test_SE0_NAK
0: Do nothing
1: Test_J
0: Do nothing
1: Test_K
0: Do nothing
1: Test_Packett
3. Register Details
Reset
00h
347

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