Epson S2R72V18 Technical Manual page 26

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Table 1-8 gives the control items and status for endpoint EP0 transaction control.
Item
Transaction direction
Descriptor reply enable
Descriptor reply
address
Descriptor size
Control prohibit
Short packet send
enable
Toggle sequence bit
Toggle set
Toggle clear
Forced NAK response
STALL response
Automatic ForceNAK
set
SETUP receipt status
Transaction status
Descriptor reply data
stage completion status
S2R72V18 Technical Manual (Rev.1.00)
Table 1-8 Endpoint EP0 control items and status
Register/bit
D_EP0Control.INxOUT
D_EP0Control.ReplyDescriptor
D_DescAdrs_H, DescAdrs_L
D_DescSize_H, DescSize_L
D_SETUP_Control.ProtectEP0
D_EP0ControlIN.EnShortPkt
D_EP0ControlIN.ToggleStat,
D_EP0ControlOUT.ToggleStat
D_EP0ControlIN.ToggleSet,
D_EP0ControlOUT.ToggleSet
D_EP0ControlIN.ToggleClr,
D_EP0ControlOUT.ToggleClr
D_EP0ControlIN.ForceNAK,
D_EP0ControlOUT.ForceNAK
D_EP0ControlIN.ForceSTALL,
D_EP0ControlOUT.ForceSTALL
D_EP0ControlOUT.AutoForceNAK
USB_DeviceIntStat.RcvEP0SETUP
D_EP0IntStat.OUT_ShortACK,
D_EP0IntStat.IN_TranACK,
D_EP0IntStat.OUT_TranACK,
D_EP0IntStat.IN_TranNAK,
D_EP0IntStat.OUT_TranNAK,
D_EP0IntStat.IN_TranErr,
D_EP0IntStat.OUT_TranErr
D_EP0IntStat.DescriptorCmp
Sets the transfer direction for the data and status
stages.
Activates automatic descriptor response.
Specifies the initial FIFO address for data
returned using the automatic descriptor
response.
Specifies the data size returned using the
automatic descriptor response.
Setting this bit blocks access to the
EP0ControlIN and EP0ControlOUT register
ForceNAK and ForceSTALL bits. This bit is set
by the LSI hardware when the RcvEP0SETUP
status is established and can be cleared by CPU
register access.
Enables transmission of short packets smaller
than the max packet size. Cleared on completion
of the in transaction sending the short packet.
Indicates the toggle sequence bit status.
Automatically initialized by the SETUP stage.
Sets the toggle sequence bit.
Clears the toggle sequence bit.
Returns NAK to in or out transactions (including
PING), regardless of FIFO data size or free
space size.
Returns STALL to in or out transactions
(including PING).
Sets the D_EP0ControlOUT.ForceNAK bit after
each out transaction is completed.
Indicates that a SETUP transaction has been
performed.
Indicates transaction results.
Indicates the completion of an automatic
descriptor response data stage.
EPSON
1. Functions
Description
9

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