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3.1.30
Port0:030h-031h / Port1:230h-231h RAM_RdAdrs_H,L (RAM Read Address High, Low)
Base Address: Port0=000h, Port1=200h
Mode
Ofst Adrs
Register Name
Device
030h-031h
RAM_RdAdrs_H,L
/ Host
Bit15-13
Reserved
Bit12-2
RAM_RdAdrs[12:2]
This sets the initial address for RAM_Rd. After setting this register, set the RAM_RdCount register,
then set the RAM_RdControl register bit to activate the RAM_Rd function. The register value
depends on the internal operation underway while the RAM_Rd function is operating. For this
reason, the register value should not be read until the CPU_IntStat.RAM_RdCmp bit is set after the
RAM_RdControl register bit has been set and the RAM_Rd function started. Values cannot be
guaranteed if this register is read while the RAM_Rd function is operating. Also note that writing to
this register while the RAM_Rd function is operating will result in malfunctions.
Bit1-0
Reserved
S2R72V18 Technical Manual (Rev.1.00)
R/W
Bit Symbol
15:
14:
13:
12: RAM_RdAdrs [12]
11: RAM_RdAdrs [11]
10: RAM_RdAdrs [10]
9: RAM_RdAdrs [9]
8: RAM_RdAdrs [8]
7: RAM_RdAdrs [7]
R/W
6: RAM_RdAdrs [6]
5: RAM_RdAdrs [5]
4: RAM_RdAdrs [4]
3: RAM_RdAdrs [3]
2: RAM_RdAdrs [2]
1:
0:
EPSON
3. Register Details
Description
0:
1:
0:
1:
0:
1:
RAM Read Address
0:
1:
0:
1:
Reset
00h
239
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