Write Timing (Sdram Access) - Renesas PFESiP/V850EP1 User Manual

(b) Write timing (SDRAM access)
BUSCLK (output)
A0-A25 (output)
BCYSTZ (output)
Note
CSZn (output)
SDRASZ (output)
SDCASZ (output)
SDWEZ (output)
DQM0-DQM3 (output)
D0-D31 (I/O)
SDCKE (output)
Note n = 1, 3, 4, 6
Remarks Broken lines indicate high impedance.
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CHAPTER 1 PRODUCT SPECIFCATIONS
Figure 1-10. Write Timing (SDRAM Access)
T0 TACT TWR
< t > < t > < t
D KA DKA DKA
< t > < t > < t
DKBC DKBC DKBC
< t >
DKCS
< t > < t
DKR AS D KRAS
< t
D KCAS
< t
DKWE
< t
DKDQM
< t >
DKDT1
< t >
DKCKE
User's Manual A19069EJ2V0UM
TWR TWR TWR
> < t > < t > < t
DKA DKA DKA
>
>
>
>
>
>
< t < t > < t
DKDT2 DKDT2 DKDT2
> < t >
DKA
< t >
DKBC
< t >
DKCS
< t >
DKCAS
< t >
DKWE
< t >
DKDQM
> < t >
HZKDT
< t >
DKCKE