Renesas PFESiP/V850EP1 User Manual page 33

32-bit microcontroller dedicated to pfesip ep-1
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BUSCLK (output)
HLDRQZ (input)
HLDAKZ (output)
A0-A25 (output)
D0-D31 (I/O)
CSZ0-CSZ7 (output)
BCYSTZ (output)
RDZ (output)
WRZ0-WRZ3, WRSTBZ
(output)
WAITZ (input)
CHAPTER 1 PRODUCT SPECIFCATIONS
Figure 1-12. Bus Hold Timing
< t
>
HKHR
< t
>
HKH R
< t
>
SHRK
< t
SHRK
< t
>
DHQHA1
< t
>
DKCF
Address
< t
>
DKCF
Data
< t
>
DKCF
< t
>
DKCF
< t
>
DKCF
< t
>
DKCF
User's Manual A19069EJ2V0UM
< t
>
SHRK
>
< t
>
WHQH
< t
>
DKHA
< t
>
DHQHA2
< t
>
WHAL
< t
>
D KHA
< t
>
DHAC
Undefined
< t
>
DHAC
< t
>
DHAC
< t
>
DHAC
< t
>
DHAC
31

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