Renesas PFESiP/V850EP1 User Manual page 48

32-bit microcontroller dedicated to pfesip ep-1
Table of Contents

Advertisement

Note
SCKn
(output)
Not e
SIn
Note
SOn
Note
Remark
Note
SCKn
(output)
Note
SIn
Note
SOn
Note
Remark
46
CHAPTER 1 PRODUCT SPECIFCATIONS
Figure 1-26. CSI Access Timing (CKP, DAP = 10)
< t
SSI
(input)
< t
DSO
(output)
n = 0, 1
Broken lines indicate high impedance.
Figure 1-27. CSI Access Timing (CKP, DAP = 11)
< t
>
SSI
(Input)
< t
>
HSO
(Input)
n = 0, 1
Broken lines indicate high impedance.
User's Manual A19069EJ2V0UM
< t
>
CSICYC
< t
>
HSI
>
< t
>
HSO
>
< t
>
CSICYC
< t
>
HSI
< t
>
DSO

Advertisement

Table of Contents
loading

Table of Contents