Table Of Contents - Renesas PFESiP/V850EP1 User Manual

CHAPTER 1 PRODUCT SPECIFCATIONS..............................................................................................11
1.1 Terminology ................................................................................................................................................. 11
1.2 Absolute Maximum Rating Value ...............................................................................................................13
1.3 Recommended Operating Range...............................................................................................................13
1.4 DC Characteristics ......................................................................................................................................14
1.5 Pull-up/Pull-down Resistance ....................................................................................................................15
1.6 Power Supply Application/Interruption Procedure ..................................................................................15
1.7 AC Characteristics ......................................................................................................................................16
1.7.1 Clock pins ........................................................................................................................................16
1.7.2 Cautions on maximum operating frequency.....................................................................................19
1.7.3 External memory interface pins .......................................................................................................19
1.7.4 SiP internal-connection bus interface pins .......................................................................................32
1.7.5 DMA interface pins ..........................................................................................................................41
1.7.6 SiP internal-connection DMA interface pins .....................................................................................42
1.7.7 Bus reset output puns......................................................................................................................43
1.7.8 CSI interface pins ............................................................................................................................44
1.7.9 N-Wire interface pins .......................................................................................................................47
1.8 A/D Converter Characteristics....................................................................................................................49
1.9 Power Supply Application/Interruption Procedure ..................................................................................50
1.9.1 Input buffer ......................................................................................................................................50
1.9.2 Output buffer/bidirectional buffer......................................................................................................50
CHAPTER 2 INTERNAL SSCG-PLL CHARACTERISTICS ................................................................... 51
2.1 Block Diagram .............................................................................................................................................51
2.2 Electrical Specifications .............................................................................................................................52
2.2.1 Recommended operating range ......................................................................................................52
2.2.2 Electrical specifications....................................................................................................................52
2.3 Setting SSCG-PLL Operation Mode with Pins ..........................................................................................53
2.3.1 PLLM0-PLLM6, PLLN0-PLLN2, PLLP0-PLLP1 (PLLM, N, P-counter select) ..................................54
2.3.2 SSMDL0 to SSMDL1 (modulation frequency range) (input) ............................................................55
2.3.3 SSADJ0 to SSADJ2 (dither range / mode) (input) ...........................................................................55
2.3.4 PLLS0 to PLLS1 (S-selector) (input)................................................................................................56
2.3.5 PLLFOEN (PLL FO output enable) (input) .......................................................................................56
CHAPTER 3 DEVELOPMENT TOOLS AND MIDDLEWARE ................................................................. 57
3.1 Development Tools .....................................................................................................................................57
3.2 Middleware...................................................................................................................................................57
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CONTENTS
User's Manual A19069EJ2V0UM