Renesas PFESiP/V850EP1 User Manual page 42

32-bit microcontroller dedicated to pfesip ep-1
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SBUSCLK (output)
SHLDRQZ (input)
SHLDAKZ (output)
SA0-SA20 (output)
SD0-SD15 (I/O)
SCSZ0-SCSZ3 (output)
SBCYSTZ (output)
SRDZ (output)
SWRZ0-SWRZ1,
SWRSTBZ (output)
SWAITZ (input)
40
CHAPTER 1 PRODUCT SPECIFCATIONS
Figure 1-19. Bus Hold Timing
< t
>
HKHR
< t
>
SHRK
< t
< t
>
DHQHA1
< t
DKCF
Address
< t
DKCF
Data
< t
DKCF
< t
DKCF
< t
DKCF
< t
DKCF
User's Manual A19069EJ2V0UM
< t
>
< t
HKHR
SH RK
>
< t
>
SHRK
WHQH
< t
>
DKHA
< t
>
DHQHA2
< t
>
WHAL
>
>
>
>
>
>
>
< t
>
DKHA
< t
>
DHAC
Unidentified
< t
>
DHAC
< t
>
DHAC
< t
>
DHAC
< t
>
DHAC

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