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1.1 Terminology
Item
Power supply voltage
Input voltage
Output voltage
Input current
Output current
Operating temperature
Storage temperature
Table 1-2. Terminology for Recommended Operating Conditions
Item
Power supply voltage
High-level input voltage
Low-level input voltage
Positive trigger voltage
Negative trigger voltage
Hysteresis voltage
Input rise time
Input fall time
CHAPTER 1
PRODUCT SPECIFCATIONS
Table 1-1. Terminology for Absolute Maximum Ratings
Symbol
V
Range of voltages which will not damage or reduce reliability when applied to the V
DD
V
Range of voltages which will not damage or reduce reliability when applied to the input pin.
I
V
Range of voltages which will not damage or reduce reliability when applied to the output pin.
O
I
Maximum current which will not cause latchup when applied to the input pin.
I
I
Maximum DC current which will not cause damage or reduce reliability when flowing to or
O
from the output pin.
T
Range of ambient temperatures for normal logical operation.
A
T
Range of element temperatures which will not damage or reduce reliability in the state
stg
where neither voltage nor current is applied.
Symbol
V
Range of voltages for normal logical operation when V
DD
V
For voltage applied to the input of PFESiP/V850EP1, this value indicates the voltage of the
IH
high-level state in which the input buffer operates normally.
● If voltage greater than the MIN. value is applied, the input voltage is assured to be high
level.
V
For voltage applied to the input of the embedded array, this value indicates the voltage of
IL
the low-level state in which the input buffer operates normally.
● If a voltage less than the MAX. value is applied, the input voltage is assured to be low
level.
V
Input level that inverts the output level when the input of PFESiP/V850EP1 is changed from
P
the low-level side to the high-level side.
V
Input level that inverts the output level when the input of PFESiP/V850EP1 is changed from
N
the high-level side to the low-level side.
V
Difference between the positive- and negative-trigger voltage.
H
r
Limit value for the rise time from 10% to 90% of the input voltage applied to the input of
ri
PFESiP/V850EP1.
t
Limit value for the fall time from 90% to 10% of the input voltage applied to the input of
fi
PFESiP/V850EP1.
User's Manual A19069EJ2V0UM
Definition
Definition
= 0 V.
SS
pin.
DD
11
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