Debug Serial Interface - Renesas PFESiP/V850EP1 User Manual

32-bit microcontroller dedicated to pfesip ep-1
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(2) Debug serial interface

The access timing of the debug serial interface is shown below.
Parameter
DMS input setup time (to DCK ↑ )
DMS input hold time (from DCK ↑ )
DDI input setup time (to DCK ↑ )
DDI input hold time (from DCK ↑ )
DDO output delay time (from DCK ↓ )
DCK (input)
DMS (input)
DDI (input)
DDO
(output)
48
CHAPTER 1 PRODUCT SPECIFCATIONS
Table 1-24. Debug Serial Interface
Symbol
MIN.
t
10.0
SDMS
t
20.0
HDMS
t
10.0
SDDI
t
20.0
HDDI
t
3.0
DDDO
Figure 1-29. Debug Serial Interface
< t
>
SDMS
< t
>
SDDI
User's Manual A19069EJ2V0UM
MAX.
15.0
< t
>
HDMS
< t
>
HDDI
< t
>
DDDO
Unit
ns
ns
ns
ns
ns

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