Status Packet - Hitachi H8/3937 Series Hardware Manual

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12.4.7

Status Packet

The Status Packet contains various types of information that the host may require. The Status
Packet will be sent to the host whenever the FLEX decoder is polled and has no other data to send.
The FLEX decoder can also prompt the host to read the Status Packet due to events for which the
FLEX decoder was configured to send it (see 12.3.2, Configuration Packet and 12.3.3, Control
Packet for a detailed description of the bits). The FLEX decoder will prompt the host to read a
Status Packet if the...
1. ... SMU bit in the Status Packet and the SME bit in the Configuration Packet are set.
2. ... MT bit in the Status Packet and the MTE bit in the Configuration Packet are set.
3. ... EOF bit in the Status Packet is set.
4. ... LBU bit in the Status Packet is set.
5. ... EA bit in the Status Packet is set.
6. ... BOE bit in the Status Packet is set.
The ID of the Status Packet is 127 (decimal).
Table 12-28 Status Packet Bit Assignments
Bit 7
Bit 6
Byte 3
0
1
Byte 2
FIV
f
Byte 1
SM
LB
Byte 0
SMU
LBU
FIV: Frame Info Valid. Set when a valid frame info word has been received since becoming
synchronous to the system and the f and c fields contain valid values. If this bit is clear, no valid
frame info words have been received since the FLEX decoder became synchronous to the system.
This value will change from 0 to 1 at the end of block 0 of the frame in which the 1st frame info
word was properly received. It will be cleared when the FLEX decoder goes into asynchronous
mode. This bit is initialized to 0 when the FLEX decoder is reset and when the FLEX decoder is
turned off by clearing the ON bit in the Control Packet.
f: Current frame number. This value is updated every frame regardless of whether the FLEX
decoder needs to decode the frame. This value will change to its proper value for a frame at the
end of block 0 of the frame. The value of these bits is not guaranteed when FIV is 0.
SM: Synchronous Mode. This bit is set when the FLEX decoder is synchronous to the system.
The FLEX decoder will set this bit when the first synchronization words are received. It will clear
this bit when the FLEX decoder has not properly received both synchronization words in any
frame for 8, 16, or 32 minutes (depending on the number of assigned frames and the system
370
Bit 5
1
f
6
5
x
x
Bit 4
Bit 3
1
1
f
f
4
3
x
c
3
MT
x
Bit 2
Bit 1
1
1
f
f
2
1
c
c
2
1
EOF
EA
Bit 0
1
f
0
c
0
BOE

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