Item
Symbol Pins
External clock
t
CPr
rise time
External clock
t
CPf
fall time
Pin RES low
t
REL
width
Input pin high
t
IH
width
Input pin low
t
IL
width
UD pin minimum
t
UDH
modulation width
t
UDL
Note:
Selected with SA1 and SA0 of system clock control register 2 (SYSCR2).
*
Applicable
Values
Min
Typ
OSC
—
—
1
—
—
DX
—
—
1
OSC
—
—
1
—
—
DX
—
—
1
RES
10
—
IRQ
to
2
—
1
IRQ
,
4
WKP
to
0
WKP
,
7
ADTRG,
TMIC
TMIF, TMIG
IRQ
to
2
—
1
IRQ
,
4
WKP
to
0
WKP
,
7
ADTRG,
TMIC, TMIF,
TMIG
UD
4
—
Max
Unit Test Condition
10
ns
V
= 2.7 V to 3.6 V
CC
25
V
= 1.8 V to 3.6 V
CC
55.0
ns
10
ns
V
= 2.7 V to 3.6 V
CC
25
V
= 1.8 V to 3.6 V
CC
55.0
ns
—
t
cyc
—
t
cyc
t
subcyc
—
t
cyc
t
subcyc
—
t
cyc
t
subcyc
Reference
Figure
Figure 13-1
Figure 13-1
Figure 13-1
Figure 13-1
Figure 13-2
Figure 13-3
Figure 13-3
Figure 13-4
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