Hitachi H8/3937 Series Hardware Manual page 400

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Table 12-34 SPI Timing (VDD = 1.8 V to 3.6 V, TA = -20ºC to 75ºC)
Characteristic
Operating Frequency
Cycle Time
Select Lead Time
De-select Lag Time
Select-to-Ready Time
Select-to-Ready Time
Re-select Time
Ready High Time
Ready Lead Time
Not Ready Lag Time
MOSI Data Setup Time
MOSI Data Hold Time
MISO Access Time
MISO Disable Time
MISO Data Valid Time
MISO Data Hold Time
SS High Time
SCK High Time
SCK Low Time
SCK Rise Time
SCK Fall Time
Notes: 1. The specifications given in this data sheet indicate the minimum performance level of
all FLEX decoders regardless of manufacturer. Individual manufacturers may have
better performance than indicated.
2. When the host re-programs an address word with a Host-to-Decoder packet ID > 127
(decimal), there may be an added delay before the FLEX decoder is ready for another
packet.
3. When the host sends a checksum packet (ID is 00) or a special packet (ID is 1C
through 1F hex) the t
and t
govern the re-select timing.
SSH
388
Conditions
previous packet did not program an
2
address word*
C
=50pf
L
previous packet programmed an address
2
word*
C
=50pf
L
previous packet was a checksum/special
3
packet*
C
=50pf
L
C
=50pf
L
C
=50pf
L
C
=50pf
L
20% to 70% V
DD
20% to 70% V
DD
specification applies, otherwise the timing specifications for t
RS
1
Symbol
Min*
Max*
f
dc
1
OP
t
1000
CYC
t
200
LEAD1
t
200
LAG1
t
80
RDY
t
420
RDY
t
30
RS
t
50
RH
t
200
LEAD2
t
200
LAG2
t
200
SU
t
200
HI
t
0
200
AC
t
300
DIS
t
200
V
t
0
HO
t
200
SSH
t
300
SCKH
t
300
SCKL
t
1
R
t
1
F
1
Unit
MHz
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
LAG1

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