Appendix D Port States In The Different Processing States - Hitachi H8/3937 Series Hardware Manual

Appendix D Port States in the Different Processing States

Table D-1 Port States Overview
Port Reset
P1 to P1 High-
7 0
impedance
P2 Low
4
P2 High
3
P2 to P2 Low
2 0
P3 to P3 High-
7 0
impedance*
P4 High
3
P4 to P4 High-
2 0
impedance
P5 to P5 High-
7 0
impedance
P6 to P6 High-
7 0
impedance
P7 to P7 High-
7 0
impedance
P8 to P8 High-
7 0
impedance
P9 to P9 High-
3 0
impedance
PA to PA High-
3 0
impedance
PB to PB High-
7 0
impedance
Notes: 1. High level output when MOS pull-up is in on state.
2. Reset output from P3
504
Sleep Subsleep
Retained Retained
Retained Retained
Retained Retained
2
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
High- High-
impedance impedance
pin only.
2
Standby Watch
High- Retained
1
impedance*
Retained Retained
High- Retained
1
impedance*
Retained Retained
High-
impedance
High- Retained
1
impedance*
High- Retained
impedance
High- Retained
impedance
High- Retained
impedance
High- Retained
impedance
High- Retained
impedance
High- High-
impedance impedance
Subactive Active
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
High- High-
impedance impedance