Hitachi H8/3937 Series Hardware Manual page 258

Bit 3: Clock source select 3 (CKS3)
Bit 3 selects the clock source to be supplied and sets the SCK
Bit 3
CKS3 Description
0 Clock source is prescaler S, SCK
1 Clock source is external clock, SCK
Note: * SCI1 is an internal function that performs interfacing to the on-chip FLEX™ decoder. It
cannot be used with SCK1 input selected.
Bits 2 to 0: Clock select 2 to 0 (CKS2 to CKS0)
When CKS3 is cleared to 0, bits 2 to 0 selects the prescaler division ratio and the serial clock
cycle.
Bit 2 Bit 1
CKS2 CKS1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
2. Serial control status register 1 (SCSR1)
Bit 7
—
Initial value 1
Read/Write —
Note: * Only a write of 0 for flag clearing is possible.
SCSR1 is an 8-bit register that indicates the operational and error status of SCI1.
Upon reset, SCSR1 is initialized to H'9C.
246
Bit 0
CKS0 Prescaler Division Ratio
0 ø/1024 (initial value)
1 ø/256
0 ø/64
1 ø/32
0 ø/16
1 ø/8
0 ø/4
1 ø /4
W
6 5
SOL ORER
0 0
R/W R/(W)*
to input or output mode.
1
is output
1
is input*
1
Serial Clock Cycle
ø = 2.5 MHz
409.6 µs
102.4 µs
25.6 µs
12.8 µs
6.4 µs
3.2 µs
1.6 µs
50 µs or 104.2 µs
4 3
— —
1 1
— —
(initial value)
2 1 0
— MTRF STF
1 0 0
— R R/W