Hitachi H8/3937 Series Hardware Manual page 443

SCR31—Serial control register 31
Bit 7
TIE31
Initial value 0
Read/Write R/W
Clock enable
Bit 1
CKE311
0
0
1
1
Transmit end interrupt enable
0 Transmit end interrupt request (TEI) disabled
1 Transmit end interrupt request (TEI) enabled
Multiprocessor interrupt enable
0 Multiprocessor interrupt request disabled (normal receive operation)
[Clearing conditions]
When data is received in which the multiprocessor bit is set to 1
1 Multiprocessor interrupt request enabled
The receive interrupt request (RXI), receive error interrupt request (ERI), and setting of the
RDRF, FER, and OER flags in the serial status register (SSR), are disabled until data with
the multiprocessor bit set to 1 is received.
Receive enable
0 Receive operation disabled (RXD pin is I/O port)
1 Receive operation enabled (RXD pin is receive data pin)
Transmit enable
0 Transmit operation disabled (TXD pin is transmit data pin)
1 Transmit operation enabled (TXD pin is transmit data pin)
Receive interrupt enable
0 Receive data full interrupt request (RXI) and receive error interrupt request (ERI) disabled
1 Receive data full interrupt request (RXI) and receive error interrupt request (ERI) enabled
Transmit interrupt enable
0 Transmit data empty interrupt request (TXI) disabled
1 Transmit data empty interrupt request (TXI) enabled
6 5
RIE31 TE31
0 0
R/W R/W
Bit 0
CKE310 Communication Mode
0 Asynchronous
Synchronous
1 Asynchronous
Synchronous
Asynchronous
0
Synchronous
Asynchronous
1
Synchronous
H'9A
4 3
RE31 MPIE31 TEIE31
0 0
R/W R/W R/W
Description
Clock Source
Internal clock
Internal clock
Internal clock
Reserved (Do not specify this combination)
External clock
External clock
Reserved (Do not specify this combination)
Reserved (Do not specify this combination)
SCI31
2 1 0
CKE311 CKE310
0 0 0
R/W R/W
SCK Pin Function
3
I/O port
Serial clock output
Clock output
Clock input
Serial clock input
431