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Direct transition time = { (Number of SLEEP instruction execution states) + (number of internal
Example: Direct transition time = (2 + 1) × 16t
CPU operating clock)
Notation:
t
:
OSC clock cycle time
osc
t
:
System clock (ø) cycle time
cyc
3. Time for direct transition from subactive mode to active (high-speed) mode
A direct transition from subactive mode to active (high-speed) mode is performed by executing a
SLEEP instruction in subactive mode while bit SSBY is set to 1 and bit LSON is cleared to 0 in
SYSCR1, bit MSON is cleared to 0 and bit DTON is set to 1 in SYSCR2, and bit TMA3 is set to 1
in TMA. The time from execution of the SLEEP instruction to the end of interrupt exception
handling (the direct transition time) is given by equation (3) below.
Direct transition time = { (Number of SLEEP instruction execution states) + (number of internal
Example: Direct transition time = (2 + 1) × 8t
øw/8 is selected as the CPU operating clock, and wait time = 8192 states)
Notation:
t
:
OSC clock cycle time
osc
t
:
Watch clock cycle time
w
t
:
System clock (ø) cycle time
cyc
t
:
Subclock (ø
subcyc
processing states) } × (t
exception handling execution states) × (t
processing states) } × (t
to STS0) + (number of interrupt exception handling execution states) } ×
(t
after transition)
cyc
) cycle time
SUB
before transition) + (number of interrupt
cyc
cyc
+ 14 × 2t
= 76t
osc
osc
osc
before transition) + { (wait time set in STS2
subcyc
+ (8192 + 14) × 2t
w
osc
after transition)
.................................. (2)
(when ø/8 is selected as the
........................ (3)
= 24t
+ 16412t
(when
w
osc
115
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