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7. Wakeup Edge Select Register (WEGR)
Bit
7
WKEGS7
Initial value
0
Read/Write
R/W
WEGR is an 8-bit read/write register that specifies rising or falling edge sensing for pins WKPn.
WEGR is initialized to H'00 by a reset.
Bit n: WKPn edge select (WKEGSn)
Bit n selects WKPn pin input sensing.
Bit n
WKEGS
Description
WKPn pin falling edge detected
0
WKPn pin rising edge detected
1
3.3.3
External Interrupts
There are 12 external interrupts: IRQ
1. Interrupts WKP
to WKP
7
Interrupts WKP
to WKP
7
WKP
. When these pins are designated as pins WKP
0
rising or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.
Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in
IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.
When WKP
to WKP
7
number 9 is assigned to interrupts WKP
vector number, so the interrupt-handling routine must discriminate the interrupt source.
2. Interrupts IRQ
to IRQ
4
Interrupts IRQ4 to IRQ
detected by either rising edge sensing or falling edge sensing, depending on the settings of bits
IEG
to IEG
in IEGR.
4
1
72
6
5
WKEGS6
WKEGS5
0
0
R/W
R/W
to IRQ
4
0
are requested by either rising or falling edge input to pins WKP
0
interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector
0
to WKP
7
1
are requested by input signals to pins IRQ
1
4
3
WKEGS4
WKEGS3
0
0
R/W
R/W
and WKP
to WKP
0
7
0
to WKP
in port mode register 5 and a
7
0
. All eight interrupt sources have the same
0
2
1
WKEGS2
WKEGS1
WKEGS0
0
0
R/W
R/W
(initial value)
(n = 7 to 0)
.
to IRQ
. These interrupts are
4
1
0
0
R/W
to
7
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