Hitachi H8/3937 Series Hardware Manual page 283

8. Bit rate register (BRR)
Bit
BRR7
Initial value
Read/Write R/W
BRR is an 8-bit register that designates the transmit/receive bit rate in accordance with the baud
rate generator operating clock selected by bits CKS1 and CKS0 of the serial mode register (SMR).
BRR can be read or written by the CPU at any time.
BRR is initialized to H'FF upon reset, and in standby, module standby, or watch mode.
Table 10-6 shows examples of BRR settings in asynchronous mode. The values shown are for
active (high-speed) mode.
Table 10-6 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1)
OSC
32.8 kHz
Bit Rate
(bit/s) n N
110 Cannot be used,
150 as error exceeds
200 3%
250
300
600
1200
2400
4800
9600
19200
31250
38400
7 6 5
BRR6 BRR5
1 1 1
R/W R/W
38.4 kHz
Error Error
(%) n N (%)
— — —
0 3 0
0 2 0
— — —
0 1 0
0 0 0
— — —
— — —
— — —
— — —
— — —
— — —
— — —
4 3
BRR4 BRR3
1 1
R/W R/W
2 MHz 2.4576 MHz
Error
n N (%) n
— — — 2
2 12 0.16 3
0 155 0.16 3
0 124 0 0
0 103 0.16 3
0 51 0.16 3
0 25 0.16 2
0 12 0.16 2
— — — 0
— — — 0
— — — 0
0 0 0 —
— — — 0
2 1
BRR2 BRR1 BRR0
1 1
R/W R/W R/W
4 MHz
Error
N (%) n N
21 –0.83 — —
3 0 2 25
2 0 — —
153 –0.26 0 249
1 0 2 12
0 0 0 103
1 0 0 51
0 0 0 25
7 0 0 12
3 0 — —
1 0 — —
— — 0 1
0 0 — —
0
1
Error
(%)
—
0.16
—
0
0.16
0.16
0.16
0.16
0.16
—
—
0
—
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