Nck/Plc Data Exchange; Effects On The Spl - Siemens SINUMERIK 840D sl Function Manual

Connecting sensors and actuators
8.4 Safety-related CPU-CPU communication (F_DP communication)
8.4.13

NCK/PLC data exchange

Cyclic F_DP data transfer
After evaluating the machine data of the F_DP communication through the NCK and PLC-F_DP
layers - and initializing the parameterized F_SENDDP and F_RECVDP drivers - cyclic
operation of both F_DP layers is started.
From this instant in time, the NCK initiates an OB40 alarm on the PLC in the set F_DP clock
cycle (multiple of the interpolation clock cycle, set using MD13320
$MN_SAFE_SRDP_IPO_TIME_RATIO). The basic program software on the PLC side for
F_DP communication is then run.
If, when attempting to issue an OB40 request to the PLC, it is identified that the previous
request has still not been executed, then no new request is issued in this F_DP clock cycle.
An OB40 request is only issued to the PLC, if the PLC has enabled the interface, i.e. after
acknowledging the previous request.
From the first unsuccessful attempt, attempts to issue a new OB40 request to the PLC are no
longer realized in the F_DP clock cycle but in the IPO clock cycle, so that a communication
error (timeout) does not occur as a result of the delay on the side of the external F-CPU.
If an OB40 request from the PLC is not acknowledged up to a max. limit value of 500 ms limit,
then Alarm 27352 "F_DP: Communication error %1, Error %2" is output and the configured
stop response (Stop D/E) initiated. F_DP communication processing is stopped. The
F_RECVDP drivers output failsafe values (0) as F-net data.
After the OB40 has been exited, the PLC returns to the level that was interrupted. The input
image on the PLC side is updated in DB18 after the end of the actual OB1 cycle. This therefore
ensures that the PLC-SPL always processes contiguous input information from a time
perspective.
8.4.14

Effects on the SPL

Using the F_DP communication has no impact on existing SPL programs with reference to the
interlocking logic in them. However, a conflict can occur when assigning SPL inputs, if an SPL
input is to be written to from several applications, e.g. F_RECVDP and PROFIsafe.
The multiple assignment of an SPL input is identified, when booting - across applications - and
is displayed using Alarm 27099 "Double assignment in SPL assignment MD %1[%2] - MD
%3[%4]".
254
Function Manual, 12/2017, 6FC5397-4BP40-6BA1
Safety Integrated