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Replace Instructions With Different Qcpu Instruction Format (excluding Anacpu/anucpu Dedicated Instructions); Instructions That Use Accumulators (a0, A1) - Mitsubishi Electric Artisan MELSEC-Q Series Manual

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7.1 Replace instructions with different QCPU instruction format (excluding AnACPU/AnUCPU dedicated instructions)

7.1 Replace instructions with different QCPU instruction format
(excluding AnACPU/AnUCPU dedicated instructions)

7.1.1 Instructions that use accumulators (A0, A1)

Some QCPU operation processing instructions are different from their corresponding ACPU instructions in
format.
This section explains the instructions that have different specified formats.
Frequently asked questions regarding the conversion of ACPU to QCPU program
(Inquiry example)
1. Instructions with different format from that of ACPU instructions are used when
upgrading to QCPU. Is further program modification necessary?
2. The devices "SD718 and SD719", which were not used in ACPU, are automatically part
of the QCPU instructions after replacement. What are these devices for? Is operation
affected by these devices?
3. "Change PLC type" executes a direct conversion of several ACPU instructions, such as
assignment and saving of operation data, but the instruction format remains similar to
that of ACPU instructions. Is it possible to further simplify the QCPU instructions using a
similar method?
(Answer)
ACPU instructions that use accumulators (A0 and A1) have different formats when
converted to QCPU instructions. These accumulators are replaced by devices SD718 and
SD719.
Therefore, the same operation as in ACPU is executed even if the instruction format is
different and SD718 and SD719 are used.
In addition, a group of multiple instructions, such as instructions to transfer data to the
ACPU accumulators (A0 and A1), can be converted to QCPU instructions and further
modified to simplify the program and reduce the number of steps.
(1) Instructions that use accumulators (A0 and A1)
(1) ACPU
Instructions that use accumulators (A0 and A1) can execute operations without explicitly specifying A0 and
A1 as the source and destination device. Also, the operation result is stored in the accumulators A0 and
A1 without specifying the device in which it is stored in.
(2) QCPU
QCPU instructions need to specify a source and destination device.
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