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Mitsubishi Electric Artisan MELSEC-Q Series Manual Page 146

General-purpose programmable controllers, large/small.
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(1) Replacing index register
"Z, Z1 to Z6, V, V1 to V6" and "Z0 to Z15" are used as index register for the ACPU and QCPU, respectively.
Therefore, their specifications differ.
"V" is used as edge relay for the QCPU. This device is used to store the PLS/PLF information of the contacts
found at the start of the ladder block.
The following table shows how the index registers should be replaced when changing ACPU programs to
QCPU programs using "Change PLC type".
ACPU
Z
Z1 to Z6
V
V1 to V6
Tip
When indexing timer/counter contact instructions, such as "LD T0", the index register limitations do not apply
to AnA/AnUCPU.
Due to the specifications, only index registers Z0 and Z1 can be used to index timer/counter contact
instructions in QCPU.
If the existing AnA/AnUCPU program uses index registers other than Z and Z1, the instructions are
unconvertible and are replaced with SM1255. In this case, it is necessary to modify the program.
(2) Index register 32-bit specification
When using index registers in 32-bit instructions in ACPU, Z register is the low- order 16 bits and the V
register, with the same number as Z, is the high-order 16 bits.
Alternatively, the QCPU treats Zn and Zn + 1 as the low-order and high-order 16 bits respectively.
The index registers should be corrected if "Change PLC type" is performed on a program that includes 32-bit
index registers.
The following is an example of instructions that have 32-bit operation results.
Instruction
DMOV D0 Z1
/ D0 D1 Z1
When converting an ACPU program to QCPU using "Change PLC type", the operation result may be stored
to an unintended index register number.
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7.3 Use index register as a 32-bit (2-word) device
QCPU
Z0
Z1 to Z6
Z7
Z8 to Z13
ACPU
V1,
Z1
(High order) (Low order)
Z1(Quotient)
V1(Remainder)
143
QCPU
Z2,
Z1
(High order) (Low order)
Z1(Quotient)
Z2(Remainder)

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