Usb-To-Uart Bridge - Xilinx AC701 User Manual

For the artix-7 fpga
Hide thumbs Also See for AC701:
Table of Contents

Advertisement

Refer to the Marvell 88E1116R Alaska Gigabit Ethernet transceiver datasheet for details
concerning the use of the Ethernet PHY user LEDs. They are referred to in the datasheet as
LED0, LED1, and LED2. The product brief and other product information for the Marvell
88E1116R Alaska Gigabit ethernet transceiver is available at:
The Marvell 88E1116R PHY datasheet may be obtained under NDA with Marvell, whose
contact information may be found at: http://www.marvell.com.

USB-to-UART Bridge

[Figure
The AC701 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U44)
which allows a connection to a host computer with a USB port. The USB cable is supplied
in the Evaluation Kit (standard-A plug to host computer, mini-B plug to AC701 board
connector J17). The CP2103GM is powered by the USB 5V provided by the host PC when
the USB cable is plugged into the USB port on the AC701 board.
Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports the
USB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send
(RTS), and Clear to Send (CTS).
Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers for the host computer.
These drivers permit the CP2103GM USB-to-UART bridge to appear as a COM port to
communications application software (for example, TeraTerm or HyperTerm) that runs on
the host computer. The VCP device drivers must be installed on the host PC prior to
establishing communications with the AC701 board.
Table 1-17
Table 1-17: USB J17 Mini-B Receptacle Pin Assignments and Signal Definitions
USB Receptacle
Receptacle Pin
Pins (J17)
Name
1
VBUS
2
D_N
3
D_P
4
GND
Table 1-18
AC701 Evaluation Board
UG952 (v1.0) October 23, 2012
http://www.marvell.com/transceivers/alaska-gbe/
1-2, callout 16]
shows the USB signal definitions at J17.
Schematic
Net Name
USB_UART_
VBUS
USB_D_N
USB_D_P
USB_UART_
GND
shows the USB connections between the FPGA and the UART.
www.xilinx.com
Description
+5V from host system -
U12 CP2103 power
Bidirectional
differential serial data
(N-side)
Bidirectional
differential serial data
(P-side)
Signal ground
Feature Descriptions
U44 Pin
U44 Pin Name
(CP2103GM)
(CP2103GM)
7, 8
REGIN, VBUS
4
D-
3
D+
2, 29
GND, GND
39

Advertisement

Table of Contents
loading

Table of Contents