Transmitter (Ds3 Circuits) - Viavi T-BERD MTS 5800 Getting Started Manual

Appendix A Specifications
T-BERD / MTS 5800 and Smart Class 4800 specifications
Table 30 DS3 receiver specifications (Continued)
Parameter
Impedance
Input Range

Transmitter (DS3 circuits)

Table 31
Table 31 DS3 transmitter specifications
Parameter
Output
Bit rate
Line coding
Clock Source
(Timing)
Frequency offset
Pulse (high)
Pulse (DSX)
Pulse (low)
Pulse shape
Impedance
Page 170
Specification
Nominal 75 Ω at 22 MHz unbalanced
High/Low: 0 to 12 dB due to cable loss at 22 MHz, from a high
signal
DSX/Monitor: -20 dB due to resistive loss in addition to 0 to 9 dB
due to cable loss at 22MHz, from a High signal
lists specifications for the transmitter when running DS3 applications.
Specification
For 5800 v1 and v2, one BNC (TX/RX2) can be used as
transmitter or receiver. For 5800-100G and 5882, one HD-
BNC (TX\RX2) can be used as transmitter or receiver.
44.736 Mbps
B3ZS
– Internal reference clock with accuracy ±1.5 ppm, ±1 ppm
per year aging
– Recovered from DS3 Rx1
– External from BITS, SETS, or CLOCK
±100 ppm, in 1 ppm steps
Nominal 1.15 Vp. Complies with ANSI T1.102-1993 and ITU-
T G.703 (11/01) after passing through 450 feet of RG59B/U
cable.
Nominal 0.6 Vp. Complies with ANSI T1.102-1993 and ITU-
T G.703 (11/01).
Nominal 0.35 Vp
With output terminated in 75 Ω resistive load and DSX
selected, the T-BERD ⁄ MTS 8000, 6000A, and 5800 meets
ITU-T Recommendation G.703 (11/01) and ANSI T1.102-
1993
Nominal 75 Ω
T-BERD/MTS/SC Getting Started Guide
22046537, Rev. 016 March 2018