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Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
2
PCI Slave Address (0,1,2 and 3) Registers
Offset
Bit
3
1
Name
Operation
Reset
2-54
MEMBA Memory Base Address. These bits define the memory
space base address of the RavenMPIC control registers.
The MBASE decoder is disabled when the MBASE value
is zero.
3
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
START
R/W
$0000
To initiate an MPC cycle from the PCI bus the PCI address must be greater
than or equal to the START field and less than or equal to the END field.
START
Start Address. This field determines the start address of
a particular memory area on the PCI bus which will be
used to access MPC bus resources. The value of this field
will be compared with the upper 16 bits of the incoming
PCI address.
END
End Address. This field determines the end address of a
particular memory area on the PCI bus which will be used
to access MPC bus resources. The value of this field will
be compared with the upper 16 bits of the incoming PCI
address.
PSADD0 - $80
PSADD1 - $88
PSADD2 - $90
PSADD3 - $98
2
2
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
PSADDx
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1
1
1
2
1
0 9 8 7 6 5 4 3 2 1 0
END
R/W
$0000
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