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Falcon ECC Memory Controller Chipset
3
Figure 3-5. Data Path for Writes to the Falcon Internal CSRs
3-24
MPC60 x Master
CSR
Upper FALCON
External register data that is written on the upper data bus goes through the
upper Falcon, while data that is written on the lower data bus goes through
the lower Falcon. Unlike the internal register set, there is no automatic
copying of upper data to lower data for the external register set.
CSR read accesses can have a size of 1, 2, 4, or 8 bytes with any alignment.
CSR write accesses are restricted to a size of 1 or 4 bytes and they must be
aligned. Some Tester registers are limited to 4-byte only accesses.
3-6,
Figure
3-7,
Figure
different kinds of access.
CSR
Lower FALCON
3-8, and
Figure 3-9
show the memory map for the
Computer Group Literature Center Web Site
1904 9609
Figure
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