Example 3: Universe Chip Is Checked At Tundra - Motorola MVME3600 Series Programmer's Reference Manual

Example 3: Universe Chip is Checked at Tundra

An engineer at Tundra Semiconductor Corporation had run a simulation on
the LSI0_CTL register, and could see that it was going to be enabled after
a port 92 reset. Motorola engineers mentioned that the problem was
primarily with the _BS, _BD, and _TO registers. He said he would run
more simulations to look at the outcome on those registers. Motorola
engineers explained what they had seen.
The engineer at Tundra re-ran the simulation based on the information
given him. He saw exactly what the Motorola engineers had seen, for
example, that the LSI0_BS, LSI0_BD, and LSI0_TO values change, as
well as the LSI0_CTL fields for program, super, and vct. He checked to
see if this is in fact what the Universe is supposed to do.
The following are his results:
Register
--------
LSI0_CTL
LSI0_BS
LSI0_BD
LSIO_TO
Explanation:
All the fields in the LSI0 registers which are "Power-up Options" cannot
be reset by assertion of RST# (PCI reset).
The following fields in the LSIO registers cannot be reset by a PCI reset:
LSI0_CTL register: EN, VAS, LAS
LSI0_BS register: Bits [31:28]
LSI0_BD register: Bits [31:28]
All the other fields in the LSI0 registers are reset to 0, which explains why
the PGM and SUPER fields changed, the translation offset reset to 0, etc.
http://www.motorola.com/computer/literature
Universe Chip Problems after a PCI Reset
Before RST# After RST#
----------- -----------
8082_5FFF 8082_0001
FFFF_FFFF F000_0000
FFFF_FFFF F000_0000
FFFF_FFFF 0000_0000
4
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