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Falcon ECC Memory Controller Chipset
FEF800A0
3
FEF800A8
FEF800B0
FEF800B8
FEF800C0
FEF800C8
FEF800D0
FEF800D8
FEF800E0
FEF800E8
FEF800F0
FEF800F8
FEF80100
FEF80200
.
.
FEF803F8
FEF80400
FEF80408
.
.
FEF804F8
FEF80500
FEF80508
.
.
FEF807F8
FEF80800
.
.
FEF80BF8
3-30
Table 3-9. Register Summary (Continued)
TEST D1 (Middle 32 Bits)
TEST D1 (Lower 32 Bits)
TEST D2 (Middle 32 Bits)
TEST D2 (Lower 32 Bits)
TEST D3 (Middle 32 Bits)
TEST D3 (Lower 32 Bits)
CTR32
PR_STAT1
PR_STAT2
TEST SRAM
Computer Group Literature Center Web Site
TEST D1 (Upper 8 Bits)
TEST D2 (Upper 8 Bits)
TEST D3 (Upper 8 Bits)
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