Application - ABB REL650 Applications Manual

Section 13
Logic
13.4.2
420
Function description
Controllable gate function block
Function description
Exclusive OR function block
Function description
Logic loop delay function block
Function description
Timer function block
Function description
AND function block
Function description
Set-reset memory function block
Function description
Reset-set with memory function block

Application

A set of standard logic blocks, like AND, OR etc, and timers are available for adapting the
IED configuration to the specific application needs.
There are no settings for AND gates, OR gates, inverters or XOR gates.
For normal On/Off delay and pulse timers the time delays and pulse lengths are set from
the local HMI or via the PST tool.
IEC 61850 IEC 60617
identification identification
GATE -
IEC 61850 IEC 60617
identification identification
XOR -
IEC 61850 IEC 60617
identification identification
LOOPDELAY -
IEC 61850 IEC 60617
identification identification
TIMERSET -
IEC 61850 IEC 60617
identification identification
AND -
IEC 61850 IEC 60617
identification identification
SRMEMORY -
IEC 61850 IEC 60617
identification identification
RSMEMORY -
1MRK 506 334-UUS A
ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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ANSI/IEEE C37.2
device number
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Application manual