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13.1.2 Programmable Wait Control Register (PW)
The PW register is an 8-bit register for specifying the number of wait states for external expansion data memory
space 10000H to FFFFFH. The PW register can be read and written with both 8-bit manipulation instructions and
bit manipulation instructions. Fig. 13-2 shows the format of the PW register.
When the RESET signal is applied, the register is set to 80H.
Fig. 13-2 Format of Programmable Wait Control Register (PW)
7
6
PW
PW31
PW30
13.2 MEMORY EXPANSION FUNCTION
13.2.1 External Memory Expansion Function
The µ PD78214 allows additional 48384-byte memory (for the µ PD78212, 56704-byte memory) and I/Os to be
connected according to the setting of the memory expansion mode register (MM).
When the memory space is expanded externally, P50 to P57 function as an address bus, and P40 to P47 function
as a multiplexed address/data bus.
When the EA signal is tied low, the µ PD78214 operates in ROM-less mode. In ROM-less mode, 64768 bytes (65536
bytes for the µ PD78212) of memory or I/Os can be connected.
The µ PD78213 is a ROM-less device, hence always uses external memory.
Caution Address information output on P50/A8 to P57/A15 and P60/A16 to P63/A19 is valid from the time the ASTB signal goes high until
the RD or WR signal goes high. Other than during this period, the output levels of P50/A8 to P57/A15 and P60/A16 to P67/A19 are
undefined. When designing circuits, take this into consideration, and make sure that the output of an undefined value will not cause
any problems. The data sheet of the relevant product gives the specification of the valid period for address output.
5
4
3
2
1
0
0
0
0
0
PW31
PW30
0
0
0
1
1
0
1
1
Chapter 13 Local Bus Interface Function
0
0
Number of wait states (range: 10000H to FFFFFH)
0
1
2
Number of wait states equivalent to low level period of
WAIT pin input
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