Contents
Table No.
8-1
Modes Generating the INTAD......................................................................................................225
8-2
A/D Conversion Time ....................................................................................................................232
8-3
9-1
Causes of Reception Errors ..........................................................................................................250
9-2
Baud Rate Setting ..........................................................................................................................254
9-3
9-4
(Asynchronous Serial Interface) ..................................................................................................257
9-5
10-1
10-2
Signals in SBI Mode ......................................................................................................................284
10-3
11-1
12-1
12-2
Interrupt Request Sources ...........................................................................................................302
12-3
12-4
Multiple-Interrupt Handling .........................................................................................................313
12-5
12-6
12-7
12-8
12-9
12-10
12-11
12-12
13-1
13-2
System Clock Frequency and Refresh Pulse Output Cycle
When Pseudo Static RAM Is Used ..............................................................................................368
13-3
14-1
Operation States in HALT Mode .................................................................................................379
14-2
14-3
14-4
Operation States in STOP Mode .................................................................................................382
15-1
15-2
Hardware States after Reset ........................................................................................................391
17-1
18-1
18-2
18-3
18-4
Title, Page
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