Restoration Timing From Self-Refresh - NEC PD78212 User Manual

µ PD78214 Sub-Series
(2) Self-refresh
Self-refresh is performed to retain the contents of pseudo static RAM when in standby mode.
(a) Setting self-refresh mode
When bit 4 (RFEN) of the RFM register is set to 1, and bit 7 (RFLV) is set to 0, pin REFRQ outputs a low-level
signal, requesting pseudo static RAM to enter self-refresh mode.
(b) Restoration from self-refresh
Refresh pulse output to pseudo static RAM is disabled for approximately 200 ns
of pin REFRQ goes high. The µ PD78214 drives pin REFRQ high, synchronized with the refresh timing
counter, so that refresh pulses are not output during a refresh disabled period.
To detect pin REFRQ going high, the read out level of bit RFLV is set to 1 when pin REFRQ goes high.
Note This time varies with the speed of the pseudo static RAM.
REFRQ
Output of
refresh timing counter
RFLV bit
Note Refresh disabled period
370
Fig. 13-21 Restoration Timing from Self-Refresh
Self-refresh mode
Execution of set manipulation by software
Note
Approx. 200 ns min.
Note
after the output level