Example Of Capacitors Connected To The A/D Converter Pins - NEC PD78212 User Manual

µ PD78214 Sub-Series
(2) About hardware-started A/D conversion
(a) Eight to twelve system clocks are required from when a valid edge appears at the INTP5 pin until A/D
conversion is actually started. Take this delay into consideration when designing your application. See
Chapter 11 for details of the edge detection function.
(b) Digital noise at the INTP6 pin cannot be eliminated normally with an in-circuit emulator. If it has been
specified that A/D conversion be hardware-started, A/D conversion may be started by an erroneously
detected edge. See Section 11.4 for detail of erroneous detection of an edge.
(3) Capacitors connected to analog input pins
To prevent malfunction due to noise, insert a capacitor between each analog input pins (AN0 through AN7)
and the AV pin and between the reference voltage input pin (AV
SS
Fig. 8-13 Example of Capacitors Connected to the A/D Converter Pins
(4) When using the STOP mode, reset the CS bit to 0 beforehand to reduce supply current. If the CS bit remains
set to 1, conversion do stops when the STOP mode is selected, but power supply to the voltage comparator
is not stopped. Consequently, the supply current to the A/D converter does not decrease.
(5) When A/D conversion is already activated by hardware start (by a valid edge at the INTP5 pin), if another valid
edge arrives at the INTP5 pin, the A/D converter may malfunction. To be specific, a malfunction occurs if the
valid edge arrives at the INTP5 pin when the previous conversion result is being stored in the A/D conversion
result register (ADCR). In this case, an A/D conversion end interrupt (INTAD) is generated. However, the value
stored in the ADCR register is not the conversion result. Instead, it is always 7FH (see Fig. 8-14).
240
Analog input
100-
500pF
Reference
voltage input
) and the AV
REF
µ
PD78214
AN0-AN7
AV
REF
AV
SS
pin.
SS