Timing Of Interval Timer Operation (2); Setting Of Control Registers For Interval Timer Operation (2) - NEC PD78212 User Manual

8-bit single-chip microcomputer sub-series
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µ PD78214 Sub-Series
Fig. 7-59 Timing of Interval Timer Operation (2) (When CR11 Is Used As a Compare Register)
TM1
count value
Compare register
(CR11)
INTC11
interrupt request
Fig. 7-60 Setting of Control Registers for Interval Timer Operation (2)
TMC1
PRM1
CRC1
154
0H
Count starts
Interval time
Remark Interval = (n + 1) × x/f
x = 16, 32, 64, 128, 256, 512
(a) Timer control register 1 (TMC1)
7
6
5
×
×
×
(b) Prescaler mode register 1 (PRM1)
7
6
5
×
×
×
(c) Capture/compare control register 1 (CRC1)
7
6
5
0
0
0
n
Cleared
Coincidence
Interrupt accepted
Interval time
, 0 ≤ n ≤ FFH
CLK
4
3
2
1
0
0
0
1
4
3
2
1
×
0
PRS12 PRS11
PRS10
4
3
2
1
0
0
0
1
n
Cleared
n
Coincidence
Interrupt accepted
0
0
Overflow flag
Enables counting TM1
0
Specifies count clock
(x/f
; where x = 16, 32, 64,
CLK
128, 256, or 512)
0
0
Disables clearing TM1, when CR10
coincides with TM1
Specifies the CR11 register as a compare
register
Enables clearing TM1, when CR11
coincides with TM1

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