µ PD78214 Sub-Series
5.5.1 Hardware Configuration
Fig. 5-21 shows the hardware configuration of port 4.
5.5.2 Setting the I/O Mode and Control Mode
The memory expansion mode register (MM, see Fig 13-1) specifies the operating mode of port 4, as listed in Table
5-5.
For the µ PD78213, port 4 functions only as the address/data bus (AD0 through AD7).
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Fig. 5-21 Block Diagram of Port 4
WR
Pull-up resistor option register
PUO
PUO4
RD
PUO
WR
P4n
Output latch
P4n
RD
P4n
Table 5-5 Port 4 Operating Modes
MM register bit
EA pin
MM2
MM1
1
0
0
1
1
1
×
0
MM0-MM2 EA
Operation mode
MM0
0
0
Input port
0
1
Output port
1
1
Address/data bus
(AD0-AD7)
×
×
V
DD
P4n
n = 0 to 7