Example Of Ppg Output Signal With A 100% Duty Factor; Example Of Rewriting Compare Register Cr00 - NEC PD78212 User Manual

8-bit single-chip microcomputer sub-series

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Even if the value of the CR00 compare register coincides with the value of 16-bit timer 0 (TM0) more than once

during one period of PPG output, the output levels on the timer outputs (TO0, TO1) are not inverted.

Remark ALV0 = 1

Cautions 1. If a value less than the value of 16-bit timer 0 (TM0) is written into the CR00 compare register before the value of CR00 coincides

with the value of TM0, a PPG signal with a 100% duty factor is output in that period. Rewrite CR00, if required, by using an

interrupt generated by a coincidence between TM0 and CR00.

Fig. 7-22 Example of PPG Output Signal with a 100% Duty Factor

Remark ALV0 = 0

Fig. 7-21 Example of Rewriting Compare Register CR00

TO0 does not change though CR00 coincides with TM0

Chapter 7 Timer/Counter Units

When a value, n2 less than TM0 value, n3 is written to CR00

here, the duty factor is 100% during this period.