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µ PD78214 Sub-Series
(4) P22 through P26 are not pulled up immediately after a reset, and the interrupt request flag may be set
depending on the function of a dual-function pin (INTP1 through INTP5). Therefore, specify connection of a
pull-up resistor in the initialization routine, before clearing the interrupt request flag.
(5) With an in-circuit emulator, the level of each pin of port 2 can be read and tested before noise is removed.
(6) For the µ PD78214, to use P40 through P47 and P50 through P57 as an address/data bus and an address bus
respectively, always reset the PUO4 and PUO5 bits of the PUO register to 0 so that a built-in pull-up resistor
is not used.
For the µ PD78213, P40 through P47 and P50 through P57 are always used as an address/data bus and an
address bus respectively, and the PUO4 and PUO5 bits of the PUO register must always be reset to 0, and a
built-in pull-up resistor must not be connected.
(7) To use P60 through P63 as an output port, always reset to the PM60 through P63 bits to 0. If they are not 0,
P60 through P63 cannot be emulated normally by an in-circuit emulator.
(8) To use analog inputs AN6 and AN7, put P66 and P67 in the input mode, respectively.
(9) To use P66 and P67 as AN6 and AN7 respectively, reset the PUO6 to 0; do not specify connection of built-in
pull-up resistors for port 6.
(10) When P66 and P67 are used as analog input pins AN6 and AN7 respectively or when A/D conversion is not
performed, do not apply a voltage out of the range AV
selected for ANI0 through ANI2 of the A/D converter mode register (ADM).
See Chapter 8 for details.
(11) To use the P66/WAIT pin as the WAIT pin, it is necessary to put P66 in the input mode using the PM6 register.
(12) When P70 through P75 are used as analog input pins AN0 and AN5 respectively or when A/D conversion is
not performed, do not apply a voltage out of the range AV
ANI0 through ANI2 of the A/D converter mode register (ADM).
See Chapter 8 for details.
(13) Although its ultimate purpose is to manipulate only 1 bit, a bit manipulation instruction accesses a port in 8-
bit units. If a bit manipulation instruction is used for a port some pins of which are in the output mode and
the other pins of which are in the input mode, the contents of the output latch corresponding to the pins in
the input mode or the control mode become undefined (except for the bits manipulated by the SET1 or CLR1
instruction). Special care should be taken if bits are switched between the input and output modes. The same
applies when the port is manipulated using 8-bit arithmetic/logical instructions.
(14) Port 7 is a 6-bit input port. The upper 2 bits of "8-bit" data from port 7 are undefined.
94
through AV
to these pins, if AN6 and AN7 are
SS
REF
through AV
to the pins that are selected for
SS
REF
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