Changing Duty Factor Of Ppg Output; Setting Procedure For Ppg Output; External Event Counter Operation - NEC PD78212 User Manual

Fig. 7-113 Setting Procedure for PPG Output
PPG output
Set CRC2 register
CRC2←D8H
Set TOC register
Set P34 pin in control mode
PMC3.6←1
Set count clock in PRM1
Set period in compare
register CR21
Set duty factor in compare
register CR21
Start counting
CE2←1

(6) External event counter operation

When functioning as an external event counter, 8-bit timer/counter 2 counts clock pulses externally applied
to the CI pin.
As shown in Fig. 7-115, the value of 8-bit timer 2 (TM2) is incremented on each valid edge specified (rising edge
only in this case) of a pulse signal applied to the CI pin.
Fig. 7-115 External Event Counter Operation (When Only One Edge Is Used)
CI pin input
TM2
Fig. 7-116 shows the setting of control registers, and Fig. 7-117 shows the setting procedure when 8-bit timer/
counter 2 functions as an external event counter.
Remark The value of TM2 is less then the number of input clock pulses by 1.
Fig. 7-114 Changing Duty Factor of PPG Output
; Sets bit 7 of TMC1
n
Chapter 7 Timer/Counter Units
Preprocessing for
changing duty factor
Clear INTC20 interrupt request
flag
CIF20←0
Enable INTC20 interrupt
CMK20←0
INTC20 interrupt
Duty factor changing
processing
Set duty factor in CR20
Disable INTC20 interrupt
CMK20←1
RETI
n + 1 n + 2
; Clears bit 3 of IF0H
; Clears bit 3 of MK0H
7
; Sets bit 3 of MK0H
201