5.1.5
Video Port Pin Data Input Register (PDIN)
The read-only video port pin data input register (PDIN) is shown in Figure 5–5
and described in Table 5–6. PDIN reflects the state of the video port pins.
When read, PDIN returns the value from the pin's input buffer (with appropriate
synchronization) regardless of the state of the corresponding PFUNC or PDIR
bit.
Figure 5–5. Video Port Pin Data Input Register (PDIN)
31
23
22
Reserved
PDIN22
R-0
R-0
15
14
PDIN15
PDIN14
R-0
R-0
7
6
PDIN7
PDIN6
R-0
R-0
Legend: R = Read only; -n = value after reset
SPRU629
Reserved
R-0
21
20
PDIN21
PDIN20
PDIN19
R-0
R-0
13
12
PDIN13
PDIN12
PDIN11
R-0
R-0
5
4
PDIN5
PDIN4
PDIN3
R-0
R-0
19
18
17
PDIN18
PDIN17
R-0
R-0
R-0
11
10
9
PDIN10
PDIN9
R-0
R-0
R-0
3
2
1
PDIN2
PDIN1
R-0
R-0
R-0
General Purpose I/O Operation
GPIO Registers
24
16
PDIN16
R-0
8
PDIN8
R-0
0
PDIN0
R-0
5-11