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Display Timing Examples
The vertical output timing for raw mode is shown in Figure 4–36. This example
outputs the same 480-line window. Note that the raw display mode is typically
noninterlaced for output to a monitor. This example shows the more complex
interlaced case. The active field 1 is 242.5-lines high and active field 2 is
242.5-lines high. This example shows the 480-line image window centered in
the screen. This results in an IMGVOFF1 of 2 lines and an IMGVOFF2 of
3 lines and also results in a nondata half-line at the end of field 1 and at the
beginning of field 2 due to their noninteger line lengths.
The VBLNK and VSYNC signals are shown as they would be output for active-
low operation. Note that only one of the two signals is actually available exter-
nally. The VBLNK and VSYNC edges for field 1 occur at the end of an active
line so their XSTART/XSTOP values are set to 720 (start of blanking). For
field 2, VBLNK and VSYNC edges occur during the middle of the active
horizontal line so their XSTART/XSTOP values are set to 360.
The FLD output is setup to transition at the start of each analog field (start of
vertical blanking). There is no EAV[F] bit in raw mode, so FLD1YSTRT is set
to 1, FLD2YSTART is set to 263, FBITCLR and FBITSET are ignored. Note
that FLD2XSTRT is 360 so that the field indicator output changes halfway
through the line.
The active horizontal output column shows the output data during the active
portion of the horizontal line. Note that in raw mode there is no blanking data
value so the default value is output for the active portion of all nonimage
window lines.
SPRU629
Video Display Port
4-41
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