Tcp2 Input Configuration Register 0 (Tcpic0); Tcp2 Input Configuration Register 0 (Tcpic0) Field Descriptions - Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP User Manual

Dsp turbo-decoder coprocessor 2 (tcp2)
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Registers
6.2

TCP2 Input Configuration Register 0 (TCPIC0)

The TCP2 input configuration register 0 (TCPIC0) is shown in
configures the TCP.
31
30
Rsvd
R/W-0
15
14
Reserved
NUMSW
R/W-0
R/W-0
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 6. TCP2 Input Configuration Register 0 (TCPIC0) Field Descriptions
Bit
Field
31
Reserved
30-16
FL
15
Reserved
14
NUMSW
13
OUTF
12
INTER
11
Reserved
10-8
RATE
7-3
Reserved
2-1
OPMOD
0
Reserved
In the above register, when the OPMOD field is 01b, it represents the first subframe, 10b represents
middle subframes, and 11b represents the last subframe. The TCP2 needs to know which type of
subframe it is processing so that it can correctly initialize the prolog sections.
28
TMS320C6457 Turbo-Decoder Coprocessor 2
Figure 33. TCP2 Input Configuration Register 0 (TCPIC0)
13
12
OUTF
INTER
R/W-0
R/W-0
Reserved
R/W-0
Value
Description
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
40-
Frame length. Frame size (should not include tail symbols).
20730
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
Number of slide window per sub-block
0
Block size 3 128
1
Block size >128
Output parameters read flag (SA mode only, must be set to 0 for SP mode).
0
No REVT generation. Output parameters are not read via EDMA3.
1
REVT generation for output parameters for EDMA3 read.
Interleaver write flag. Only used in standalone mode.
0
Interleaver table is not sent to the TCP2
1
Interleaver table is sent to the TCP2
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
Code rate = 1/rate except for 0 = 3/4
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
0-3h
Operational mode. This two bit signal defines the processing mode for the TCP2. If the size of the
frame is less than or equal to 20,730, then the TCP2 is in the more efficient standalone mode. If the
size of the frame is greater than 20,730, then the TCP2 is in shared mode.
00
Standalone mode
01
Shared-processing mode first subframe
10
Shared-processing mode middle subframe
11
Shared-processing mode last
Shared mode breaks the frame into smaller frames called subframes. The size of each subframe
(except the last subframe) must be an integer multiple of 256. For subframe equations, see
Figure
17.
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
Figure 33
and described in
FL
R/W-0
11
10
Reserved
R/W-0
3
2
OPMOD
R/W-0
www.ti.com
Table
6. TCPIC0
16
8
RATE
R/W-0
1
0
Reserved
R/W-0
SPRUGK1 – March 2009
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