Table of Contents
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Index
LFDE bit
in VCACTL 3-53
in VCBCTL 3-68
M
mode selection
TSI capture 3-2
video capture 3-2
video display 4-2
N
NH bit
in VDIMGOFF1 4-69
in VDIMGOFF2 4-71
noncontinuous frame capture for 525/60 format
example A-2
noncontinuous frame display for 525/60 format
example A-10
notational conventions iii
NV bit
in VDIMGOFF1 4-69
in VDIMGOFF2 4-71
O
overview 1-2
VIC port 6-2
video capture 3-1
P
PCR 5-4
PCR bits 3-76
PCR header 3-39
PCRE bits 3-77
PCRM bit 3-77
PDCLR 5-17
PDCLRn bits 5-17
PDIN 5-11
PDINn bits 5-11
PDIR 5-8
PDIRn bits 5-8
PDOUT 5-13
PDOUTn bits 5-13
Index-4
PDSET 5-15
PDSETn bits 5-15
PEREN bit 5-4
peripheral bus reset 2-2
PFUNC 5-6
PFUNCn bits 5-6
PICLR 5-25
PICLRn bits 5-25
PIEN 5-19
PIENn bits 5-19
PIPOL 5-21
PIPOLn bits 5-21
PISTAT 5-23
PISTATn bits 5-23
PK10B bits
in VCACTL 3-53
in VCBCTL 3-68
power-on reset 2-2
PRECISION bit 6-6
program clock reference (PCR) header 3-39
PVPSYN bit 4-55
R
raw data mode 3-32, 4-25
capture notification 3-32
capture selection 3-33
capturing video 3-46
displaying video 4-49
FIFO overrun 3-47
FIFO packing 3-33
FIFO unpacking 4-26
RDFE bit 3-53
registers
GPIO 5-2
peripheral control register (PCR) 5-4
peripheral identification register (VPPID) 5-3
pin data clear register (PDCLR) 5-17
pin data input register (PDIN) 5-11
pin data output register (PDOUT) 5-13
pin data set register (PDSET) 5-15
pin direction register (PDIR) 5-8
pin function register (PFUNC) 5-6
pin interrupt clear register (PICLR) 5-25
pin interrupt enable register (PIEN) 5-19
pin interrupt polarity register (PIPOL) 5-21
pin interrupt status register (PISTAT) 5-23
SPRU629
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