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BT.656 and Y/C Mode Field and Frame Operation
3.4.4
Field Identification
In order to properly synchronize to the source data stream and capture the
correct fields, field identification needs to be performed. Field identification is
made using one of three methods: EAV, field indicator input, or field detect
logic. The field identification method is determined by the EXC, FLDD, and
FINV bits in VCxCTL.
Table 3–9. Field Identification Programming
VCxCTL Bit
EXC
FLDD
Field Detect Method
0
0
EAV code
0
1
EAV code
1
0
Use FID input
1
1
Use field detect (from HSYNC and VSYNC inputs)
In the BT.656 standard and in many Y/C standards, a field identification (F) bit
is contained in EAV and SAV codes embedded in the data stream. In the EAV
field detect method, the F bit in the EAV of the first line of every field is checked.
If F = 0, then the current field is defined as field 1. If F = 1, then the current field
is defined as field 2. Depending on how the first line of a field is defined (as
determined by the VRST bit in VCxCTL) and the video stream being captured,
the F value at the start of a field may not reflect the actual field being supplied.
The FINV bit in VCxCTL allows the detected field value to be inverted. (For
example, in BT.656 525/60 operation, the F bit changes to 0 to indicate field 1
on the fourth line of the field. If the VRST bit is cleared so the line counter begins
counting at line 1 of the field (the first EAV where V is 1), then the F bit still indi-
cates field 2 (F = 1) and needs to be inverted. If the VRST bit is set to start
counting lines beginning with the first active line (the first EAV where V is 0),
the F value will have already changed to indicate field 1 (F = 0) and no inver-
sion is necessary.)
The field indicator method uses the FID input directly to determine the current
field. This is useful for Y/C data streams that do not have embedded EAV and
SAV codes. The FID input is sampled at the start of each field. If FID = 0, then
field 1 is starting; if FID = 1, then field 2 is starting. The start of each field is
defined by the VRST bit in VCxCTL and is either the start or end of vertical
blanking as determined by the VBLNK input. The FINV bit may be used in this
method in systems where the FID input has the opposite polarity or where the
field identification change lags the start of the field.
3-24
Video Capture Port
SPRU629
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