Bit Raw Data Fifo Packing - Texas Instruments TMS320C64x DSP Reference Manual

Dsp video port/vcxo interpolated control (vic) port
Hide thumbs Also See for TMS320C64x DSP:
Table of Contents

Advertisement

Raw Data Capture Mode
The 20-bit raw data mode stores all data into a single FIFO. One sample is
placed right justified in each word and zero or sign extended as shown in
Figure 3–21.
Figure 3–21. 20-Bit Raw Data FIFO Packing
VCLKINA
VDIN[19–0]
Raw 0
63
5251
0 / SE
0 / SE
0 / SE
0 / SE
Y FIFO
63
5251
0 / SE
0 / SE
0 / SE
0 / SE
Y FIFO
3-36
Video Capture Port
Raw 1
Raw 2
Raw 3
Raw 4
Raw 5
32
31
Raw 7
Raw 5
Raw 3
Raw 1
Little-Endian Packing
3231
Raw 6
Raw 4
Raw 2
Raw 0
Big-Endian Packing
Raw 6
Raw 7
Raw 8
Raw 9
Raw 10
20 19
0 / SE
Raw 6
0 / SE
Raw 4
0 / SE
Raw 2
0 / SE
Raw 0
2019
0 / SE
Raw 7
0 / SE
Raw 5
0 / SE
Raw 3
0 / SE
Raw 1
Raw 11
0
0
SPRU629

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tms320c6000

Table of Contents