Epak Parity Error; Scsi Present; System Status Register 3; Dram Size - Performance Computer PT-VME161 User Manual

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Section FUNCTIONAL DESCRIPTION

EPAK Parity Error

SCSI Present

System Status Register 3

System Status Register 3 is an 8-bit, read only register. This register resides at location 68000000h.

DRAM Size

Parity Installed

Interval Timer Interrupt Pending

50 Extensible Single Board Computer/Controller User's Manual
When the EPAK Parity Error bit (named EPAKPE) is read as 1, it indicates that a parity error
was detected during a DRAM read cycle by an EPAK master. Notification of the error is though
a Bus Error that is generated as a acknowledgment to the EPAK module on the DRAM refer-
ence. The Bus Error Handler for the EPAK must check this bit to determine if bad DRAM parity
was the source of the Bus Error. EPAKPE is cleared by reset and after each time System Status
Register 2 is read. EPAKPE is register bit 4.
When the SCSI Present bit (named SCSIP) is read as 1, it indicates that the SCSI controller and
associated logic is installed. SCSIP is register bit 5.
The DRAM Size field (named DRAMSZ) indicates the size of the DRAM module installed on
the PT-VME161 base board. DRAMSZ is a three bit field. It consists of register bits 0 through
2, where bit 0 is the least significant bit. The following table elaborates the possible values:
Value DRAM Size
7-5 Reserved
4 64 Meg
3 32 Meg
2 16 Meg
1 8 Meg
0 4 Meg
If equal to 1, the Parity Installed bit (named PARI) indicates parity logic and memory is popu-
lated on the DRAM module. PARI is register bit 3.
The ITIP bits reflect the state of the respective Interval Timer Request Latch. When set (1) the
bit indicates that the Interval Timer's OUTPUT pin has been asserted. These bits will remain
set until explicitly reset using the RITI field in System Control Register 2. After Local Reset all
ITIP bits will be cleared (0). ITIP0, ITIP1, and ITIP2 correspond to register bits 4, 5, and 6,
respectively.