Example A - Performance Computer PT-VME161 User Manual

7
Section APPENDICES
!
Step 2
Step 3
Step 4
Step 5
NOTE: The following steps are only necessary when the slave image is programmed for the first
time following power-up or board reset, and also after the system is forced into BI-mode by setting
the SBI bit in the SCV64 General Control Register. When host is in BI-mode, all CPU cycles to/from
the VMEbus are ignored.
Step 6
Step 7
!
CAUTION: Since the location monitor is located in VME space, bit 31 of the address generated by
the PTI host must be set, and the page bit (VPG) of the System Control Register programmed appro-
priately. Be aware that in order for the host to have access to the location monitor, the slave image
must be in a proper space according to the master memory map. That is, in order to access the loca-
tion monitor in the A32 slave image, the address must be in A32 space.
Step 8
Step 9

Example A:

To set up a 4 MByte, A32 image starting at VME address 08000000h with the lower 128KByte read/
write protected, perform the following steps according to the above outline:
106 Extensible Single Board Computer/Controller User's Manual
CAUTION: The A24 base address must be a multiple of the amount of memory installed
on board.
Select the desired address protection boundary by entering the required value into SCV64
Access Protect Boundary Register.
Set the A24SLVEN bit (located in the SCV64 Mode Control Register) if an A24 image is
desired; clear it to disable the A24 image.
NOTE: The A32 slave image is always enabled unless all slave images (A24 and A32) are
disabled as discussed in Step 5.
Set the PROT bit (located in the SCV64 Mode Control Register) if both read and write
protection of the selected address protection boundary is desired; clear it if only write
protection is required.
NOTE: Access protection is only valid when memory is accessed using a slave image
address.
Set the VINEN bit (located in the SCV64 Mode Control Register) to enable all programmed
A24/A32 images; clear it to disable all A24/A32 slave images.
Check the BARDY bit of the SCV64 Control and Status Register to make sure it is set,
which means that the slave image has been programmed correctly.
Write any value to the location monitor (located at the top longword and the lower (even)
word of the top longword in each of the A24 and A32 slave images) in order to exit from
BI-mode, allowing accesses to/from VMEbus.
Read from the SCV64 Location Monitor FIFO Read Port in order to clear the entry. A read
access directly to the location monitor will be ignored.
Check the BI bit in SCV64 Status Register 1 to make sure it is cleared, meaning that the
SCV64 is not in BI-mode.