Performance Computer PT-VME161 User Manual page 135

positions ..............................................................................................................12
summary ..............................................................................................................67
L
Local Reset ...............................................................................................................38, 45, 46
Location Monitor ......................................................................................................99
access ..................................................................................................................106
default address ....................................................................................................60
longword data types ..................................................................................................8
M
Main Memory ...........................................................................................................59
burst mode ...........................................................................................................36
MC68040 ..................................................................................................................28
8-bit I/O considerations ......................................................................................95
auto-vector interrupts ..........................................................................................40, 43
burst mode ...........................................................................................................28
Bus Error - DRAM Parity ...................................................................................30
Cache clearing .....................................................................................................96
Cache Control Register .......................................................................................95
Caching ...............................................................................................................94
caching EPAK space ...........................................................................................46
CINV instruction .................................................................................................96
EPAK considerations ..........................................................................................95
Exception processing ..........................................................................................96
initialization ........................................................................................................95
interrupts .............................................................................................................68
non-serialized accesses .......................................................................................95
NOP instruction ..................................................................................................95
Transparent Translation Registers ......................................................................46, 95, 96
MC68681, see DUART
MC68EC060 .............................................................................................................9
Memory Map ............................................................................................................59
message FIFO ...........................................................................................................37
N
Nonvolatile Timekeeping RAM ...............................................................................31, 59, 71
Extensible Single Board Computer/Controller User's Manual 121
Performance Computer